CITIC Securities released a research report stating that with the NVIDIA GTC 2026 conference approaching, the company's chip product portfolio is expected to expand further. Beyond the full suite of six core chips for the Vera Rubin AI platform, details regarding the Rubin Ultra chip and server rack might be disclosed at the event, bringing innovations in design architecture for data interconnection and power delivery. The visibility for new product implementations, such as orthogonal backplanes and CPO, is anticipated to increase. Focusing on the computing chain inflation theme, against the backdrop of persistently stronger-than-expected global demand for computing power, robust conditions and price increases in upstream segments are likely to continue. This remains the most certain theme for allocating towards "prosperity growth" within the technology sector. The firm believes the NVIDIA GTC 2026 conference will further strengthen market confidence in the AI industry's sustained growth and the realization of incremental logic. CITIC Securities' main viewpoints are as follows:
Key Point 1: The Rubin platform introduces a new chip combination, demonstrating extreme co-design. At CES 2026, NVIDIA launched the full suite of six core chips for the Vera Rubin AI platform: the Rubin GPU, Vera CPU, BlueField-4 DPU, NVLink 6 Switch, ConnectX-9 SuperNIC, and Spectrum-6 Ethernet Switch. This encompasses all major chip components within the server rack. The chip manufacturing process has been upgraded to TSMC's 3nm technology, and they are equipped with HBM4, resulting in comprehensive upgrades to memory capacity and bandwidth. This product generation enables stronger synergy between the GPU, CPU, and interconnect chips, while the modular design enhances the rack's overall integration compared to the previous Blackwell generation.
Key Point 2: Potential disclosure of more Rubin Ultra details, with anticipation for architectural innovations in data interconnection and power delivery. Given that NVIDIA confirmed at CES 2026 that the Vera Rubin platform has entered mass production, the firm believes GTC 2026 might shift focus towards revealing more details about the Rubin Ultra chip and server rack. Beyond the Rubin Ultra chip itself, which integrates four compute DIES to achieve double the computational performance of the standard Rubin chip, two major architectural directions for this super-node are noteworthy: 1) Regarding data interconnection, the scale-up capability is significantly enhanced. The copper cable backplane solution might be upgraded to a two-tier super-network architecture comprising PCB orthogonal backplanes for interconnect within the Canister and optical interconnects for interconnect between Canisters. New processes, materials, and products like 78L RPCB, M9 CCL, Q-glass electronic fabric, and CPO are expected to be implemented. 2) Concerning the power system: Power supply and energy consumption are increasingly becoming bottlenecks for expanding the computing infrastructure. Solutions such as 800V High Voltage Direct Current power supply systems and modular power delivery are anticipated to be introduced, potentially driving upgrades in processes and products like embedded PCB technology and GaN third-generation semiconductors.
Key Point 3: NVIDIA is expected to launch a new inference chip, the LPU, to strengthen its inference product line. NVIDIA is likely to elevate AI inference to a system-level infrastructure, with the LPU + CPX pooled disaggregation solution reinforcing the inference product portfolio. Regarding the LPU: At the GTC conference, the firm expects NVIDIA to introduce a new inference chip integrating Groq's LPU technology. It is anticipated to feature a custom chip architecture specifically designed for LLM inference, a redesigned Tensor Streaming Processor, and the use of SRAM for on-chip memory, significantly boosting data storage and retrieval speeds, making it highly suitable for the high bandwidth demands of the decoding phase. Regarding CPX: NVIDIA's Rubin CPX, launched in 2025, can effectively reduce costs in the prefill phase and might utilize GDDR7 or HBM3E as the primary memory specification. In terms of product form factor, according to SemiAnalysis, the CPX might shift from being integrated into the Rubin Compute Tray to being shipped as an independent rack alongside the NVL72 VR200. Based on industry chain information, the LPU might also be released as a 256-card LPX independent rack.
Key Point 4: Potential outlook on upgrade directions for the next-generation Feynman architecture. Design trends for NVIDIA's next-generation Feynman architecture are garnering increasing industry attention, and NVIDIA might showcase related content at GTC 2026. Based on current industry information, Trendforce expects Feynman to be among the first chips adopting TSMC's A16 process. For power delivery, it might utilize Super Power Rail backside power delivery, freeing up more routing space, and could potentially incorporate 3D stacking technology for integration with Groq's LPU hardware stack, among other features. Regarding the implementation timeline, production could commence in 2028, with customer shipments starting from 2029. While specific details of the Feynman architecture remain unclear, the firm believes NVIDIA's understanding of future upgrade paths for the AI computing infrastructure is critically important. Against the backdrop of slowing Moore's Law, how innovation in computing power, storage power, and network power will support the continuous iteration of the AI industry, the evolving roles of training and inference, and the visibility of AI investment return cycles are areas where NVIDIA might provide more inspiration and surprises at the GTC conference.
Risk factors include geopolitical risks, slower-than-expected volume ramp-up of new products from overseas computing power leaders, weaker-than-expected growth in AI market demand, risks of continued price increases for components like memory, risks associated with technological changes and product iterations, policy regulation and data privacy risks, and intensifying competition in the PCB industry.
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