Samsung's Physical AI Chiplet Platform Set for Tape-Out Early Next Year

Deep News05-26

Samsung Electronics is set to formally advance its foundry business for the "Physical AI" semiconductor platform starting next year. The company is expected to collaborate with Cadence Design, a global leader in electronic design automation (EDA) and intellectual property (IP), to supply semiconductor products for various Physical AI applications, including automotive, robotics, and industrial automation.

According to industry sources, the "Physical AI Chiplet Semiconductor Platform Chip," jointly developed by Samsung Electronics and Cadence Design, is scheduled for tape-out in early next year.

Considering that the subsequent mass production cycle typically requires at least six months, actual products based on this Physical AI chiplet platform are anticipated to launch in the second half of next year.

Earlier in January, Samsung Electronics and Cadence Design officially announced their collaboration to develop a Physical AI semiconductor platform based on a chiplet architecture, utilizing Samsung's 5-nanometer (nm) foundry process. Industry analysis suggests that this partnership has now further detailed the production timeline and commercialization roadmap.

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