Analyst Ming-Chi Kuo has published a report stating that the next-generation advanced packaging technology, CoPoS, from Taiwan Semiconductor Manufacturing (TSM.US) is anticipated to enter mass production in the second half of 2028. Its objective is to enhance the mass production economic viability for packages exceeding 9.5 times the reticle size. Nvidia's AI chip, codenamed Feynman, is expected to be among the first to adopt this technology.
According to the research, glass materials are not a replacement for Ajinomoto Build-up Film (ABF). The chip interconnect functionality is achieved through a combination of the redistribution layer (RDL) on the chip side, the through glass vias/copper interconnect structures within the glass substrate, and the ABF build-up layers. Consequently, glass and ABF film form a complementary and co-existing structure, with no substitution relationship between them.
The architecture of the glass core substrate is primarily divided into three layers: glass serves as the core layer, which is then encapsulated by ABF build-up layers on the top and bottom (forming an ABF-GCP structure). The challenges in glass processing, such as through glass vias (TGV) and copper filling/metallization, pertain to this stage.
Based on industry surveys, glass is utilized in two distinct applications with different dimensions: a 310mm x 310mm temporary glass carrier, and glass panels sized at 250mm x 250mm (for testing) or 510mm x 515mm (for mass production). These panels are processed and subsequently diced into individual glass core substrates.
Kuo indicated that CoPoS will continue and strengthen TSMC's existing advantages in advanced packaging. This advantage is projected to remain clearly visible until approximately 2032.
Comments