Advanced Packaging Battle Intensifies for AI Chips as TSMC's CoWoS Capacity Strained, Intel's EMIB Emerges as Potential Alternative for Google's TPU Supply

Deep News06-02 17:50

Demand for AI chips continues to exert pressure on advanced packaging capacity, with Intel's EMIB-T technology emerging as a potential alternative solution for Google's next-generation TPU supply chain.

According to supply chain reports, amid the ongoing tightness of Taiwan Semiconductor Manufacturing's CoWoS packaging capacity, Intel is actively promoting its EMIB packaging technology to Google for the integration of AI chips, memory, and other core components. Google is seen as a significant potential client for the EMIB technology.

It is also reported that Powerchip Semiconductor and AP Memory Technology Corp have entered evaluation for Google's TPU supply chain. AP Memory's silicon capacitor products are said to play a key role in a MediaTek-designed AI chip project for Google.

From a market perspective, these developments suggest the competitive landscape in the advanced packaging sector may be due for a reshuffle. If Intel's EMIB-T technology secures more orders from Google, the beneficiaries could extend beyond Intel itself to potentially include related packaging supply chains. However, the final placement of orders will hinge on Intel's production yield performance and Google's comprehensive evaluation of cost versus supply chain strategy.

Packaging Bottlenecks Fuel Search for Alternatives

The rapid growth in AI chip demand is making the packaging stage one of the earliest pressure points in the supply chain. Packaging is responsible for integrating computing chips like CPUs or GPUs with components such as memory into a single unit, forming a critical bottleneck for AI accelerator delivery.

Taiwan Semiconductor Manufacturing's CoWoS technology is currently widely regarded as a mainstream solution for AI chip packaging, but persistently high demand is accelerating the market's focus on alternative technologies. Intel's EMIB technology is positioned as a potential alternative path to CoWoS.

It is disclosed that Intel's EMIB-T solution utilizes Through-Silicon Via technology for interconnects. Supply chain sources have long linked this technology to the packaging needs of Google's next-generation AI TPU. Reports indicate Google is evaluating the possibility of incorporating EMIB-T technology into its packaging solutions.

Yield and Cost Present Dual Challenges

Although Intel is reportedly in discussions with Google regarding packaging support for the next-generation TPU, uncertainty remains regarding the finalization of any orders. Reports suggest the ultimate decision may significantly depend on Intel's production yield levels.

Concurrently, cost is a crucial consideration. It is reported that, for cost-control reasons, Google is considering having its chip designs executed directly by Taiwan Semiconductor Manufacturing rather than through a partnership with MediaTek. However, Intel's entry into Google's TPU supply chain consideration is precisely facilitated by the existing Google-MediaTek collaboration. This indicates Google is still evaluating various supply chain pathways, seeking a balance between cost control and technical feasibility.

Intel has stated that, compared to CoWoS, its EMIB technology offers advantages in cost and scalability, claiming its performance can reach the level of high-end technologies like SoW. If these technical claims are validated in the practical application of Google's TPU project, it could strengthen Intel's competitive position in the AI packaging market. For Intel, this represents not only a commercial opportunity for its packaging technology but also a potential entry point into the custom AI chip supply chain.

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