The evolution of AI computing towards high-density, continuous full-load, and strong transient impact scenarios has made high-voltage architecture the definitive direction for data center power supply systems. Driven by hardware technology advancements, 2026 is poised to be the inaugural year for the practical implementation of high-voltage architectures in data centers. Core third-generation compound semiconductor devices like SiC and GaN are expected to benefit significantly from the ongoing upgrades to data center power systems. SiC is anticipated to dominate applications on the facility side (gray space), while GaN is expected to see widespread adoption within server racks (white space), creating a market landscape where SiC and GaN diverge at the boundary between gray and white spaces, both benefiting from the iteration of data center power solutions.
Market Opportunity and Investment Outlook
The transformation of data center power supply solutions is set to create substantial demand and a broad market for the SiC and GaN industries. As the power density of data center computing chips increases and energy conversion efficiency requirements become more stringent, third-generation compound semiconductors SiC and GaN, leveraging their superior physical properties, are expected to gradually replace silicon-based power semiconductors on both the facility and server rack sides. Our analysis projects that by 2030, the number of SiC and GaN devices per megawatt (MW) of data center construction could reach approximately 10,000 and 21,000 units, respectively, with corresponding per-MW value potentially reaching $22,000 and $49,000, indicating a considerable market opportunity.
Regarding investment timing, the short-term impact of high-voltage architecture on the supply of third-generation semiconductors is expected to be limited, while the long-term optionality should be appropriately priced. Aligning with research from Semi Analysis, we concur that the evolution of data center power architecture will progress through four developmental stages. Between 2026 and 2030, the rack (white space) and facility (gray space) sides are expected to be gradually upgraded to 800V/±400VDC systems, driving demand growth for third-generation compound semiconductors. In the short term (1-2 years), the transitional architecture led by 800V sidecars may have a limited effect on boosting SiC demand. However, as several key developments materialize—including 1) blade-level step-down conversion or even high-density 800V-to-6V power conversion on the rack side, 2) centralized rectification on the facility side, and 3) the adoption of Solid-State Transformers (SST)—we believe the long-term optionality for companies in the SiC and GaN space should be more accurately valued.
Chinese companies are presented with a clear growth opportunity. We observe that Chinese enterprises have already established a deep presence in the SiC and GaN sectors, with their competitiveness continuously improving. In the future, Chinese third-generation compound semiconductor industry chain companies are likely to benefit significantly from the penetration of high-voltage architectures in data centers.
High-Voltage Architecture as the Inevitable Path Forward
We consider high-voltage architecture to be the necessary solution for data center power systems as they surpass the physical limits of traditional designs in the face of high-density AI computing, continuous full loads, and intense transient shocks. In detail, as computing scale expands, data center power supply is encountering significant challenges. These primarily stem from an order-of-magnitude leap in rack power density, GPU/whole-rack loads shifting from steady-state to microsecond-to-millisecond level剧烈 fluctuations, and traditional low-voltage AC/low-voltage DC links simultaneously hitting walls in terms of current, copper losses, conversion stages, heat dissipation, footprint, reliability, and deployment speed.
The Strain of AI Demand on Traditional Power Systems
The explosion in AI computing demand has shattered the compatibility foundation of traditional power architectures. AI rack power density has already undergone an order-of-magnitude increase. We note that NVIDIA's iterative products continuously push single-rack power higher. According to NVIDIA projections, Hopper architecture rack power is around 40kW, Blackwell GB300 NVL72 architecture rises to 140kW, the next-generation Rubin architecture exceeds 200kW, the planned 2027 Kyber architecture targets over 600kW, and the 2028 Feynman architecture is set to break 1MW. Therefore, compared to the traditional 7kW rack power standard, future single-rack power could increase nearly 140-fold, representing a cross-order-of-magnitude growth that we believe will far exceed the carrying capacity of traditional architectures.
Limitations of Traditional Low-Voltage AC Architecture
If data centers continue to rely on low-voltage AC architecture, one bottleneck is the high losses and material stress caused by large currents. At constant power, lower voltage implies higher current. The sustainability of a power architecture is fundamentally governed by three equations. With a given power P, a lower voltage U results in a higher current I. Conductor losses and heat generation increase with the square of the current (I²). To reduce losses, the formula suggests we can only increase the conductor cross-sectional area, meaning consuming more copper and using larger connectors and busbars, which further increases volume, weight, cost, and installation complexity.
In AI data centers, the high-current problem ultimately translates into a copper issue. According to data from S&P Global's "Copper in the Age of AI," AI data centers have significantly higher copper demand than traditional data centers. Chinese AI training data centers exhibit copper intensity as high as 47 tons/MW, exceeding the 21 tons/MW for cryptocurrency data centers. Non-cryptocurrency general data centers typically range between 30–40 tons/MW. A single hyperscale AI data center can use up to 50,000 tons of copper, compared to about 5,000 tons for a typical traditional data center. Therefore, we believe that persisting with traditional low-voltage methods would make the growth in copper cables and busbars unsustainable.
A second bottleneck lies in the inherent technical shortcomings of AC systems, which are no longer suitable for AI scenarios. Under traditional AC links, each stage adds losses and uncertainty. The traditional data center power chain typically involves: medium-voltage AC input → transformation/distribution → rectification/PFC → UPS → power distribution unit (PDU)/busway → server PSU AC-DC → intermediate bus/board-level DC-DC → GPU low-voltage high-current supply. Traditional three-phase low-voltage AC systems have inherent technical issues like three-phase balancing, harmonic interference, and reactive power compensation, leading to high operational complexity and limited stability. In AI scenarios, the drawback of this architecture is the numerous conversion stages, each contributing efficiency loss, thermal loss, space occupation, control coupling, and potential failure points. During AI training, GPU clusters can experience millisecond-level large-scale synchronized start-stop cycles, with a 1GW data center potentially generating 700MW of instantaneous power fluctuation. AC systems can only smooth out these fluctuations by over-provisioning grid capacity and consuming无效 power, which is costly and inefficient.
It is important to note that the industry has a short-term alternative evolution path: the OCP Diablo ±400V / Mt.Diablo split power architecture promoted by Google, Meta, and Microsoft. This solution decouples the traditional power supply and server from the same rack into separate Power rack and IT rack configurations (a power rack supporting server racks, similar to the first stage of NVIDIA's 800VDC方案 we will discuss later). A sidecar or independent power rack handles AC/DC conversion and backup power, then outputs bipolar ±400VDC to IT racks, standardly covering 100kW to 1MW per rack, and supporting high-density deployments up to 800kW or 1MW+ through parallel connections. This is currently a more pragmatic transitional path for hyperscale cloud providers. The OCP solution is an intermediate platform balancing efficiency, power density, standardization, and deployability, not a rejection of the 800V endgame. However, the ±400V方案 is not without cost; its three-wire structure requires one more neutral/common wire than a single-polarity 800V system, and the system must handle positive/negative load balancing and 4-pole DC protection. In scenarios above 600kW, wiring complexity and system control difficulty are higher than for a two-wire 800V system.
Therefore, we maintain our view that 800VDC represents the medium-to-long-term trend. In the medium to long term, the industry's goal remains the higher-voltage, fewer-conversion-stage 800VDC architecture and ultimately the SST endgame. In the short term, OCP Diablo ±400V may be the first step for HVDC to achieve scale.
Four-Phase Evolution and Semiconductor Demand
Under the iterative trend towards higher voltage, higher frequency, and higher density in power architectures, the performance shortcomings of traditional silicon-based power devices are becoming increasingly apparent, making it difficult to meet the upgrade demands of 800VDC architecture. Consequently, third-generation wide-bandgap semiconductor devices like SiC and GaN, with their excellent physical properties, are presented with clear incremental substitution opportunities.
From a four-phase overview: Phase 1 retains the original AC distribution, transformers, UPS, and switchgear but adds a Sidecar (800VDC side-hanging power rack) at the rack row, rectifying AC to 800VDC near the racks. Phase 2 architecture is similar to Phase 1, still using Sidecars for row-level AC/DC, but the step-down location moves from the Power shelf inside the rack forward to the on-board module of the Compute blade. In Phase 3, a dedicated rectifier in the gray space directly converts 415VAC to 800VDC, then distributes it throughout the chain via a DC busway. Phase 4 is the SST endgame, using an SST to directly convert medium-voltage AC to 800VDC, replacing low-voltage transformers and low-voltage rectifiers.
Across these four architecture evolution phases, due to significant differences in voltage levels, operating frequencies, and power scales at different power conversion stages, SiC and GaN have formed a clear division of labor with differentiated penetration rhythms. SiC devices excel in high-voltage tolerance, high-power handling, high-temperature stability, and technological maturity, making them suitable for high-voltage, high-power front-end power conversion and circuit protection scenarios. Typical applications include high-power PSU front-end PFC, AC-DC conversion modules, 800V-to-54V/50V step-down units, facility-level rectifiers, solid-state circuit breakers (SSCB), and solid-state transformers (SST). GaN devices offer superior high-frequency characteristics, miniaturization advantages, and power density advantages in medium-to-low voltage conditions, making them more suitable for精细化, high-frequency backend step-down conversion scenarios. Core applications include 54V-to-12V step-down modules, high-power IBCs, and compact DC-DC conversion units close to computing modules.
Phase 1 (2026/2027): White Space Retrofit, Sidecar Transition
Phase 1 is a transitional restructuring phase that modifies the white space (rack side) while leaving the gray space largely unchanged. Existing medium-voltage transformers, low-voltage AC distribution, centralized UPS, and switching equipment in the data center remain mostly the same. The change occurs in the White space, where a 42U HVDC power rack / sidecar is added beside the IT rack. It receives 415V/480VAC from the overhead busway, performs rectification, and outputs 800VDC to the adjacent IT rack, while integrating BBU battery backup modules and optional supercapacitor buffers. This completes the first architectural leap from traditional AC入柜 to 800VDC入柜. The goal of white space retrofit is to剥离 the increasingly bulky power system from the computing rack, freeing up physical space for GPUs and cooling.
Phase 1 addresses several white space pain points: First, it frees up rack净空间. Moving AC/DC out of the rack reduces the space occupied by power shelves within the IT rack, releasing space for computing and cooling. This is particularly important for the Vera Rubin platform in 2026/2027 and subsequent higher-power platforms. As rack power increases to 180–220kW or higher, continuing to place high-power PSUs inside the rack would rapidly erode GPU deployment density. Second, it establishes a雏形 for distributed backup power. Although centralized UPS begins to phase out more noticeably in Phase 2, the Phase 1 sidecar already integrates BBU and optional supercapacitors, essentially establishing a雏形 for distributed backup in the white space. BBU handles second-to-minute级长时掉电续航, while supercapacitors handle microsecond-to-millisecond级瞬态吸收, together beginning to take over some functions of the traditional UPS. Third, it improves efficiency, though the幅度 is limited. Efficiency improvement in Phase 1 is not a leap; since gray space UPS and traditional AC backbone remain, efficiency improves modestly from the current ~82.0% AC baseline to ~83.7%. A真正的跃迁 occurs in Phase 2 with the removal of more UPS double-conversion stages, reaching ~86.5% efficiency.
In Phase 1, the sidecar's front-end AC-DC/rectification/PFC represents the most critical application for SiC. Under 800VDC, SiC is most suitable for high-voltage front-end applications. Traditional PSUs primarily rely on silicon MOSFETs, but under higher-power HVDC architecture, SiC is better suited for PFC and AC/DC front-ends. Particularly in a White-space retrofit, the sidecar's AC-DC module accounts for about 58% of its cost, with SiC being the core high-voltage switching device in this section. Therefore, Phase 1 SiC usage is primarily体现在 the front-end rectification/PFC/three-phase AC-DC module of the sidecar.
The BBU high-voltage interface and bidirectional DC/DC represent a secondary beneficiary位置. BBUs are upgrading from original 5.5kW modules to 8–12kW and further climbing towards 25kW. In Lite-On Technology's 800VDC, 660kW next-generation high-voltage DC power rack solution, the BBU battery unit consists of five 22kW modules并联 to form a single-shelf 110kW储能机架, using a 3RU standardized structure. Under full load, it can achieve 45 seconds of continuous discharge,承担秒级断电 voltage ride-through职能. It works in tandem with supercapacitors for millisecond-level瞬态稳压, forming a time-domain互补. Together, they gradually replace the core functions of traditional UPS, serving as a key配套储能环节 for AI机房去UPS化 architecture.
Using Lite-On Technology's 800VDC 660kW side-hanging power rack as a practical case for SiC device calculation, the framework is divided into two main sections: the power side (Power rack) and the IT load side (IT rack). Based on this analysis, we estimate the full-chain SiC用量 for Phase 1 to be 1,594 units per MW.
Phase 2 (2027/2028): The Turning Point with Native 800VDC Computing
From an architectural change perspective, Phase 2 has two critical turning points: First, the voltage step-down point moves from the Power shelf inside the IT rack forward to the onboard power module on the Compute blade. According to Semi Analysis, in Phase 1 (Oberon), the Power shelf inside the rack steps down 800VDC to about 50VDC before sending it to the compute tray. In Phase 2 (Kyber), the 800VDC busbar connects directly to the Compute blade, where an On-blade power module handles the final step-down to about 50V. This brings two impacts. First, the rack interior no longer requires a large, centralized power shelf. Second, the high-voltage power supply distance is extended, while the low-voltage high-current distance is shortened. Concurrently, the rack form factor also changes from being Power shelf-dominated to Compute blade-dominated. Second, centralized low-voltage UPS begins to phase out, with distributed UPS composed of rack-level BBU and supercapacitors taking over short-term backup power and瞬态缓冲.
From the perspective of SiC/GaN用量, the most critical change in Phase 2 compared to Phase 1 is the On-blade power module. We will analyze the power device usage in this section.
The Intermediate Bus Converter (IBC) is the conversion stage between rack-level power distribution and the processor's final Voltage Regulator Module (VRM). It generates an intermediate bus voltage for the server tray, which is further stepped down to the sub-1V voltage required by the GPU core. Common intermediate voltage specifications include 50V, 12V, and 6V. The traditional 48V/54V IBC architecture is a low-voltage rack bus solution used in low-power-density server clusters. However, when rack power increases from 100–160 kW to 600 kW or even over 1MW, the operational efficiency of this architecture significantly declines.
Both Phase 1 and Phase 2 are transitional stages involving white space改造 with基本不动 gray space, where AC is rectified to 800VDC at the row-level Power rack. The difference lies not upstream but in the location of the final major voltage step-down. In Phase 1 (Oberon), the IT rack's internal Power shelf first steps 800VDC down to ~50VDC before sending it to the Compute tray. In Phase 2 (Kyber), the 800VDC busbar is delivered directly to the Compute blade, where the power module on the Blade completes the final high-to-medium voltage conversion. Therefore, the function of the On-blade power module in Phase 2 is the new form of the IBC in a high-voltage DC architecture. The IBC is the intermediate bus conversion stage between Rack-level distribution and the final processor VRM, generating intermediate buses like 50V, 12V, or 6V.
We believe that on the On-blade socket of Phase 2, GaN will replace most of the SiC used in the corresponding Power shelf位置 of Phase 1. This is because the core goal of Phase 2 is to complete high-voltage isolated conversion on the Blade while meeting requirements for volume, heat dissipation, thickness, reliability, and integration proximity to the GPU.
We estimate that approximately 10,303 to 10,667 units of GaN per MW will replace most of the SiC用量 in the corresponding Power shelf位置 of Phase 1, retaining only the SiC used for board-level high-voltage hot-swap protection.
Regarding changes in SiC用量: On one hand, in the Phase 2 800V HVDC architecture, even if the main power loop of the blade-side IBC fully adopts GaN方案,大幅替代 traditional SiC step-down demand, Hotswap (board-level high-voltage hot-swap protection) remains a relatively certain刚性需求 scenario for SiC on the blade side at this stage. According to Infineon's official 800V rack architecture reference design (using a 1200V CoolSiC JFET), server blades connecting to a live 800V DC busbar must rely on a 1200V SiC JFET for controlled pre-charge, discharge, and surge suppression to ensure safe hot-swapping and maintenance of high-power blades under live conditions. Due to the low容错空间 of an 800V high-voltage busbar, the system requires devices with stable high-voltage linear ranges and the ability to withstand fault冲击能量—a苛刻工况 currently only满足 by SiC devices. Therefore, Phase 2 blade-side SiC demand does not come from the IBC main step-down loop but from the前置高压保护支路, representing a刚性增量不受 GaN替代影响 and the core source of SiC value retention in the second phase.
On the other hand, as 400V/800V HVDC architectures are deployed at scale in data centers, the response speed of traditional mechanical circuit breakers cannot match the microsecond-level fault protection requirements of high-voltage DC systems. Solid-State Circuit Breakers (SSCB) become another新增 SiC增量来源 in 800V power supply systems. Under high-voltage DC conditions above 600V, silicon carbide MOSFETs, with their advantages in high voltage tolerance, fast switching speed, and strong fault withstand capability, become the optimal device choice for SSCBs,主流适配 750V, 1200V, 1700V high-voltage规格器件. SSCB deployment is not limited to the server blade onboard端 but is广泛分布在 multiple配电节点 like rack入口, branch circuit层级,整排配电层级, facility配电中心, and SST output支路. We estimate SiC usage for the SSCB portion to be 506 units per MW.
Based on the above, we estimate the overall full-chain SiC用量 for Phase 2 to be approximately 1,755 units per MW.
Phase 3 (2028/2029): Redesigning Electrical Architecture with Centralized Rectifiers
One major change in Phase 3 is that the gray space transforms from an AC distribution center into a DC injection center—the most significant alteration in this phase. In Phase 3, MV transformers and MV switchgear still exist, and LV transformers are retained to step down medium voltage to 415V AC for use by centralized rectifiers. What is真正被移除 is the equipment serving AC distribution below the rectification point. The gray space is split into two: pre-rectification remains the AC world compatible with the traditional public grid; post-rectification enters the native 800VDC DC world.
The most crucial new equipment is the facility-level centralized rectifier. Its role is not only to convert 415V AC to 800VDC but, more importantly, to consolidate the rectification capability previously分散在一列列 sidecars into a larger-power, higher-efficiency,更强保护 integrated facility-level device in the gray space.
The change in white space is reflected in the Battery rack替代 Power rack. In the first two phases, the core incremental equipment in the white space was the HVDC Power Rack / Sidecar, which simultaneously handled AC-DC rectification, BBU, supercapacitors, and DC distribution. In Phase 3, AC-DC rectification has moved up to the gray space, so the white space side rack只剩下 three major components: the DC/DC power distribution unit, the BBU shelf, and the CBU (Capacitor Backup Unit).
Regarding SiC space breakdown in Phase 3:
► Rectifier: Anchoring the industry's mainstream 100kW规格 AC-DC rectifier module as the minimum calculation unit, based on a 1MW system capacity:
System installed capacity: 1MW rated power theoretically requires 10 x 100kW rectifier modules. Factoring in the data center standard N+1 redundancy design and power device并联降额工艺 constraints, the actual落地 installed module count after considering redundancy and derating coefficients is 27 modules per MW.
Single module SiC device基准: This rectifier module follows the industry-standard three-phase totem-pole PFC + LLC topology. Referencing Lite-On's earlier 800V power PSU device configuration standard, a single module固定搭载 14 SiC devices (including PFC-side MOSFETs, LLC primary-side MOSFETs, and output rectification SBDs).
Combining total installed modules and single-module device count, we estimate SiC device用量 for the rectification环节 to be approximately 378 units per MW.
► DC-DC Distribution (800VDC to 48VDC): Using a phase-shifted full-bridge + synchronous rectification topology, based on a 2.5kW规格 server power supply as the basic unit, and依据单模块标准化 SiC配置 and the number of complete units required for a 1MW load, we estimate SiC用量 for this环节 to be approximately 4,400 units per MW (650V规格器件).
► BBU Lithium Battery Backup Unit: Referencing Wolfspeed's mature bidirectional DC/DC方案, based on the定型参数 of a 25kW modular bidirectional full-bridge product, corresponding SiC用量 is 720 units per MW. The CBU supercapacitor unit's circuit topology, single-unit power, and SiC selection rules align with the BBU, with per-MW SiC用量持平 with the BBU.
► Facility Energy Storage PCS (BESS/ESS): Bidirectional full-bridge + LLC architecture, selecting a 250kW standard power module,叠加 N+1 redundancy configuration to determine total installed unit count, we estimate SiC需求 to be 80 units per MW.
► SSCB Solid-State DC Circuit Breaker: Consistent with the SSCB situation in Phase 2, maintaining the forecast of 506 units per MW.
Based on our calculations, the full-chain SiC需求量 for Phase 3 is 6,948 units per MW.
Impact of Navitas GaNFast on GaN Demand in Phase 3/4
On June 3, 2026, Navitas Semiconductor Corp announced a deep collaboration with the NVIDIA MGX ecosystem, formally embedding its GaNFast gallium nitride solution into NVIDIA's 800VDC AI infrastructure architecture. We believe this will directly impact the power semiconductor usage in the On-blade power环节 of Phase 3. The Power Distribution Board (PDB) directly replaces the traditional Intermediate Bus Converter (IBC), becoming a key variable in the power chain.
The core of this collaboration lies in using GaN to directly drive 800V→6V conversion,淘汰 the previous 48V/54V IBC.
The Navitas GaNFast方案 introduces an 800V→6V Power Distribution Board (PDB) with three core breakthroughs: First, topology reconfiguration, eliminating the 48V intermediate bus. 800V is stepped down directly to 6V via 16 GaNFast chips, directly interfacing with the backend VRM,完全替代 the original IBC function. Second, performance leap, with peak efficiency of 97.5%, switching frequency of 1MHz, power density of 2100W/in³, an超薄 board that can贴合 GPU layout, and compatibility with the full series of Rubin Ultra/Kyber rack computing units. Third, ecosystem lock-in, as the official designated solution for the MGX ecosystem, covering the full-chain power supply of NVIDIA's next-generation AI factories, with规模化落地 starting in 2027 alongside the 800VDC architecture.
The resulting core variable is increased GaN用量. The original total GaN用量 per MW of computing in Phase 2 was 10,303–10,667 units. After adjustment, per-MW GaN用量 further increases to 20,800 units.
It is important to emphasize that during the power architecture evolution of Phase 2 and Phase 3, the incremental space brought by SiC devices is not显著体现在 the server onboard (On-blade) step-down power supply side. Currently, onboard scenarios are mostly medium-to-low voltage DC-DC conversion, where device selection still favors low-cost silicon-based or low-voltage GaN options. The performance advantages of high-voltage SiC cannot be fully leveraged here.
Phase 4 (Post-2029): The SST Endgame
Phase 4 is defined as the "SST最终形态," simultaneously eliminating the low-voltage transformer layer and the low-voltage rectifier layer. While Phase 3 already pushes the rectification point to the gray space, forming a facility-level 800VDC backbone via centralized rectifiers, its upstream仍然保留 the串联结构 of MV→LV transformer and LV AC→800VDC rectifier. Phase 4进一步压缩 this into a single-device direct MVAC→800VDC conversion,彻底消除 the low-voltage AC transition layer still retained in Phase 3.
The SST in a data center is a medium-voltage energy routing system centered around high-frequency power electronics and high-frequency磁性器件, a megawatt-level电力电子装置 that replaces 50/60Hz line-frequency transformers and rectifiers with wide-bandgap devices and medium/high-frequency magnetic components.
We believe three technical outcomes lead to SST becoming the endgame solution. First,高频化. Traditional transformers are constrained by 50/60Hz, necessitating reliance on large-volume iron cores and大量 copper. SST uses front-end semiconductors to convert AC to kHz—hundreds of kHz级高频 signals, enabling显著缩小体积 for medium/high-frequency transformers. SST transformation frequencies can reach 20kHz or even over 100kHz. Second,模块化. The ISOP structure allows SST to scale via series/parallel connection of sub-modules, with single-module power levels typically集中在 60–100kW and total systems expanding to 1MW–10MW. Therefore, SST天然匹配 the "prefabricated, modular,快速交付" construction approach of AI data centers. Third,原生多功能性. SST is not a passive transformer but an active control device, inherently possessing capabilities like power factor correction, harmonic suppression, bidirectional power flow, and energy storage/renewable energy DC coupling.
In the SST stage, short-term SST prototypes and small-batch projects may still use IGBTs as a transition. In the medium to long term, SiC is highly likely to be the core成立条件 for规模化落地.
From a medium-to-long-term perspective, without SiC, SST难以成立; with SiC, SST can achieve高频化 and小型化. We believe the current SST core CHB+DAB cascaded ISOP architecture, which is more aligned with engineering reality and cost optimization, is not an aggressive全链路 switch of both CHB and DAB to SiC MOSFETs. It is more likely a分层器件配置 where the CHB side primarily uses Si-IGBTs and the DAB side primarily uses SiC MOSFETs. This is because the working intervals, loss composition, frequency targets, magnetic component constraints, and cost elasticity differ completely for CHB and DAB. The CHB front-end is essentially a medium-voltage grid-friendly low/medium-low frequency rectification stage, with typical switching frequencies of only 240Hz, 2kHz, 3kHz, and losses more determined by conduction loss and system-level device count. Therefore, the efficiency gain from SiC here is insufficient to cover its device premium and the complexity of drive/EMI/reliability. In contrast, the DAB isolation stage is the "heart" of the SST, typically operating at 30kHz, 50kHz, 70kHz, or even above 100kHz, with over 60% of system losses concentrated here. High-frequency soft-switching, high power density, and high-frequency transformer小型化 all highly depend on low-switching-loss devices. Therefore, adopting SiC MOSFETs for DAB is a key prerequisite determining whether SST can成立. Practical cases support our view. In the SST prototype from Korea's KRRI, the CHB uses 1.7kV Si-IGBTs with a switching frequency of only 240Hz, while the DAB uses 1.7kV SiC MOSFETs with a switching frequency of 30kHz.
In terms of value, SST further shifts the SiC value center from inside the rack forward to the站级高压基础设施侧. Specifically:
► Approximately 8-12 power modules per phase. Based on the number of series modules per phase = single-phase rectification peak voltage / single-module DC rated withstand voltage, calculating with a 10kV line voltage three-phase grid, single-phase peak DC ≈ 10kV√2/√3 = 8.16kV. If a single module withstands 680V, then the number of series modules per phase N=12.
► Three phases合计 36 modules. If each module uses an H-bridge (0颗) + DAB (8颗 SiC) integrated topology, then a single module requires 8 SiC MOSFETs;总计约 288 SiC MOSFETs per 120kW. SST SiC MOSFET density is 2.4 units/kW. Under an 800kW single-rack baseline scenario, if SST capacity is配置等额 per rack, that's 1,920 SiC MOSFETs.
Finally, based on our calculations, the SiC value量 contained in the gray space where SST resides accounts for 54% of the full-chain SiC value量,显著高于 the first three phases.
Value Progression from Discrete Devices to Full SST Architecture
The data center 800V HVDC power supply system is iterating along the Phase1→Phase4 path, with each architectural upgrade推动 SiC per-MW hardware value显著抬升. From早期零散使用 SiC only in low-voltage rack power环节 to逐步渗透 in distribution and rectification环节,最终升级至 the全固态变压器 SST architecture, per-MW SiC hardware value rises from the initial $1k–$2.5k in early stages to $27k, showing a clear阶梯式增长特征. Among these, the SST环节, due to dual upgrades in voltage level and power density, becomes the全链路价值弹性最大的环节.
Regarding calculation assumptions, this analysis uses industry-leading manufacturers' long-term agreement (LTA) bulk procurement prices as the baseline for SiC and GaN device unit prices:
► SiC器件区分架构阶段定价: Non-SST rack-level, UPS/PDU peripheral, 800V transition, and complete SST architecture分别匹配 corresponding power segment 1200V级 SiC MOSFET量产长协价格. GaN器件按应用场景差异化取值: 800V-side 650V integrated GaN IC, low-voltage 100V级 GaN chiplet, and GPU-proximal内置 GaN分别参考海外原厂规模化 AI server order成交价, not using retail分销高价,贴合 data center bulk采购的真实产业定价环境. For non-SST/rack-internal device side, we take bulk LTA unit price of $2.5-3.5/unit. For UPS/PDU/BESS peripheral insertion side, we take bulk LTA unit price of $3.5-5/unit. For 800V transition/early SST端, we take bulk LTA unit price benchmark of $10/unit. For SST中, 3.3kV SiC取 bulk LTA unit price benchmark of $50/unit, and 1200V规格 SiC bulk LTA unit price benchmark取 $15-20/unit.
► For GaN devices: For the GaN used in Phase 2's 800V→50V on-blade HV IBC, we take a bulk LTA unit price benchmark of $3.8/unit. For the GaN used in the 50V→12V low-voltage IBC, we take a bulk LTA unit price benchmark of $2.2/unit. For Phase 3/4, for the GaN used on a single Navitas GaN PDB, we take a bulk LTA unit price benchmark of $3.2/unit. For GPU-proximal used GaN, we take a bulk LTA unit price benchmark of $2.2/unit.
Based on the above assumptions and the previously calculated required quantities of SiC/GaN per MW for corresponding phases, we project the future value space for SiC/GaN as follows:
► From the perspective of SiC用量 and value空间:
Quantity dimension: Growing from 1,594 units/MW in Phase 1 to 9,886 units/MW in Phase 4, with an overall compound annual growth rate (CAGR) of approximately 83.73%.
Value dimension: Increasing from $2k–$15k/MW in Phase 1 to $220k/MW in Phase 4, with an overall CAGR of 144.78% to 379.14%.
► From the perspective of GaN用量 and value空间:
Quantity dimension: Growing from the initial切入 10,303–10,667 units/MW in Phase 2 to 20,800–21,600 units/MW in Phase 3/4, with an overall CAGR of approximately 95–110%.
Value dimension: Increasing from $33k–$33.8k/MW in Phase 2 to $46.56k–$49.12k/MW in Phase 3/4, with an overall CAGR of 38–49%.
Key Risks to Consider
Risk of slower-than-expected 800VDC architecture industrialization progress. We believe the 800VDC architecture is poised to become a key evolution direction for high-power supply in AI data centers, driving demand for SiC devices in high-voltage rectification, SST, high-voltage protection, BBU, and high-voltage DC-DC等环节. However, 800VDC is currently still in the early stages from prototype verification and small-batch导入走向规模部署. The industry still has significant分歧 regarding power topology, redundancy methods, certification standards, operational systems, and safety protection. The大规模商用窗口 for native single-ended 800VDC方案 could potentially be delayed from 2027 to 2028 or later. If subsequent engineering validation, customer certification, and规模化落地节奏 for 800VDC, HVDC, or SST are slower than expected, it may lead to低于预期 order fulfillment, revenue recognition, and业绩弹性 for SiC on the AI data center side.
Risk of SiC market share erosion under the OCP Diablo ±400V architecture. If future high-voltage DC rack power supply更多沿 the OCP Diablo / Mt.Diablo bipolar ±400V路线落地, rather than完全收敛到 single-polarity 800V, then due to this architecture's output being +400V/0V/-400V three-level, with single-device voltage stress controllable within the 650V级 GaN coverage range, there exists the possibility for 650V GaN to分流部分 SiC用量 in rack-level HVDC→48V/50V and some intermediate-level conversion环节 via three-level topologies.展开来讲, the busbar natively carries a +400V/0V/-400V three-level waveform, directly享受 low THD (Total Harmonic Distortion) advantages;无需额外增加 voltage divider capacitors, NPC/ANPC clamping devices, enabling implementation with成熟 650V GaN and requiring fewer SiC devices. From a topology原理看, the Diablo architecture leverages the busbar's天然中点 to form an equivalent three-level system,无需额外增加 flying capacitors, clamping diodes, etc. 650V GaN can cover the full power conversion chain耐压需求. Conversely, this risk for SiC also represents a渗透机会 for GaN.
Risk of intensifying industry competition and price declines. As the migration from 6-inch to 8-inch wafers accelerates and domestic and international manufacturers continue to expand production, the SiC industry is gradually transitioning from前期 supply偏紧 to a price competition stage. According to OFweek, global planned capacity for silicon carbide substrates (6-inch equivalent) in 2025 exceeds 3 million wafers per year, while actual downstream demand is only about 1.5 million wafers (automotive) plus 0.5 million wafers (solar/storage/industrial). The domestic situation is more激进: In 2023, China's 6-inch conductive SiC substrate产能同比激增 96%. According to领先光学官网, China's capacity is预计 to account for 50% of global capacity by 2026. Concurrently, leading Chinese manufacturers are加速扩产 in 8-inch substrates and devices, and海外龙头 may重新参与竞争 through高端 products and capital structure optimization after restructuring. If future industry expansion节奏 continues faster than下游需求释放, or second-tier manufacturers争夺订单 through price concessions, it may lead to持续承压 ASPs and毛利率修复慢于预期 for the SiC industry,进而影响相关企业盈利能力.
Risk of slower-than-expected customer certification and order conversion. As the 800VDC architecture逐步向 data center side导入,云厂商, server manufacturers, and power system manufacturers have显著提升 requirements for the reliability, safety, thermal stability, and continuous operation capability of high-voltage power supply systems, typically requiring较长周期 to complete prototype testing, small-batch validation, and supply chain certification. If the engineering performance of related SiC devices and systems in high-voltage protection, driving, thermal management, fault interruption等环节 is低于预期, or if prototypes and送测 cannot顺利转化为规模订单, it may影响相关厂商订单节奏与收入增长.
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