The explosive growth in AI computing power demand is propelling semiconductor packaging materials toward a profound generational shift. As the physical limits of Moore's Law become increasingly apparent, glass substrates, centered on Through-Glass Via (TGV) technology, are moving from the laboratory to large-scale mass production. They are expected to replace traditional silicon and organic substrates as the mainstream carrier for next-generation advanced packaging.
A recent industry deep-dive report assigned an "Overweight" rating to the glass substrate sector. It projects that the global advanced packaging TGV market will approach $80 billion by 2028, with penetration rates potentially rising to 50% by 2030, suggesting significant further market expansion.
Global semiconductor giants like Intel, Samsung, and Taiwan Semiconductor Manufacturing have incorporated glass substrates into their core technology roadmaps. Intel has explicitly listed them as a central pillar of its packaging technology roadmap from 2026 to 2030, targeting a more than 10x increase in interconnect density. Samsung Electro-Mechanics began supplying semiconductor glass substrate samples to Apple in April 2026, with mass production planned for 2027 and beyond. Taiwan Semiconductor Manufacturing is positioning glass substrates as the core direction for the next iteration of its CoWoS packaging technology. This collective endorsement from industry leaders signals a growing consensus on the transition "from silicon to glass."
Traditional Solutions Hit Physical Limits, Glass Substrates (TGV) Fill the Gap
The demand for computing infrastructure from AI large model training chips continues to climb, making the inherent flaws of traditional packaging substrates increasingly prominent in large-size, high-frequency scenarios.
The coefficient of thermal expansion (CTE) of organic substrates is six to seven times that of silicon. At the scale of AI chips, temperature differences can cause warpage, potentially leading to solder ball cracking or even chip failure. Simultaneously, the high dielectric loss of organic substrates causes severe signal attenuation at ultra-high frequencies, forcing digital signal processors to operate under excessive load and creating a vicious cycle of "signal degradation—increased power consumption—worsening heat dissipation."
Taiwan Semiconductor Manufacturing's CoWoS packaging partially addresses these issues by introducing a silicon interposer. However, silicon interposers require wafer fab capacity and cleanroom resources. The cost of a large silicon interposer can exceed $100, with the interposer alone potentially accounting for over half of the total packaging cost, creating a cost bottleneck that limits widespread adoption.
Glass substrates have emerged as a solution. Glass has a relative dielectric constant of about 3.8, significantly lower than silicon's 11.7. Its loss factor is 2 to 3 orders of magnitude lower than silicon, enabling a 3.5x increase in signal transmission speed, a 3x improvement in bandwidth density, and a 50% reduction in energy consumption. Furthermore, glass offers the advantage of a "tunable CTE," allowing precise matching with silicon chips to effectively control package warpage by selecting specific grades.
TGV Technology: The Critical Leap from Lab to Production
The core of Through-Glass Via (TGV) technology lies in creating micron-scale vertical conductive vias in ultra-thin glass substrates, establishing the shortest electrical signal paths between chips. The concept was first proposed by Dr. Michael in Germany in 2010 and was extended to the packaging substrate field by Intel in 2023.
Key process barriers for TGV are concentrated in two areas: first, forming high-aspect-ratio vias with high quality in brittle glass, and second, achieving reliable metallization to fill these vias. Historically, yield and efficiency in these steps could not meet mass production requirements, keeping TGV in the laboratory stage.
Recent years of sustained R&D investment across the global supply chain have broken through these critical bottlenecks. In via formation, domestic company Wg Tech (Jiangxi) Group Co.,Ltd. achieved processing capabilities for 3-micron diameter vias with a 150:1 aspect ratio in 2024. By 2026, industrial-grade equipment from Huary Laser is expected to achieve via diameters below 3 microns with over 95% consistency across millions of vias. In metallization, Shanghai Tiancheng Technology's self-developed electroplating technology has achieved complete, void-free filling of vias with diameters between 20 and 50 microns. In high-density wiring, by 2025, Chinde Semiconductor broke through TGV ultra-fine line redistribution layers, achieving line width/spacing of no more than 2 microns, meeting the integration needs of high-bandwidth memory.
Currently, wafer-level TGV substrate costs are already about 30% lower than traditional TSV technology. As the industry transitions from wafer-level to panel-level processing, yields improve beyond 85%, and domestic supply chain collaboration advances, TGV unit costs are expected to enter a rapid decline phase. This will facilitate penetration from high-end AI and HBM applications into larger markets like consumer electronics and automotive electronics.
Three Major Demand Drivers Underpin Broad Market Potential
AI computing and High-Performance Computing (HPC) represent the largest foundation for TGV. The required area for interposers in Taiwan Semiconductor Manufacturing's CoWoS-S technology has rapidly increased from 1,200 square millimeters in 2017 to 2,700 square millimeters projected for 2026. Traditional silicon interposers suffer from plummeting yields and exponentially rising costs at such large sizes, while glass substrates can be easily fabricated in large sizes while maintaining extremely low warpage. The aforementioned report estimates that by 2028, TGV penetration in the global advanced packaging market will reach 30%, with a market size approaching $80 billion.
High Bandwidth Memory (HBM) forms a second growth curve. HBM4 stacking reaches 12 to 16 layers, and future HBM6 is expected to exceed 24 layers. Warpage caused by CTE mismatch with organic substrates directly impacts yield. Samsung, in collaboration with Chemtronics, is developing a 71×71 mm glass interposer for GPU-HBM interconnects, with potential mass production by 2028. SK Hynix has explicitly mentioned exploring glass substrate technology in its HBM4 roadmap and plans mass production of 16-layer 48GB HBM4 devices in Q3 2026.
Optical communication and Co-Packaged Optics (CPO) are among the first sub-segments to see adoption. Electrical signal rates in 1.6T/3.2T optical modules have surpassed 100Gbps PAM4, a demand traditional organic substrates can no longer meet. Products related to 1.6T optical module glass substrate carriers from Tongge Micro, under Wg Tech (Jiangxi) Group Co.,Ltd., have completed small-batch sampling. Boe Technology Group Co.,Ltd. officially launched glass panel-level packaging substrates for semiconductor packaging at BOE IPC 2024, becoming the first business unit on the mainland to transition from display panels to advanced packaging.
Global Competitive Landscape: U.S., Europe, and Japan Lead, Domestic Players Accelerate Breakthroughs
The current TGV industry exhibits a "pyramid" competitive structure, overall at a critical inflection point transitioning from R&D verification to scaled mass production.
Overseas, Corning leverages its proprietary fusion process, achieving TGV vias of 20-100 microns in diameter with a 10:1 aspect ratio. Intel employs a composite process of laser modification and chemical etching, achieving via aspect ratios up to 100:1 and minimum diameters of just 5 microns, over 30% better than current industry levels. Samsung uses FOPLP technology with 510×515 mm glass panels, achieving via position accuracy better than ±2 microns, and plans to fully adopt TGV for HBM4.
Domestically, a full-chain industry layout is taking shape. On the upstream materials side, Gebija's semiconductor glass substrate products have been sampled to several well-known domestic semiconductor manufacturers, and its carrier products have passed verification and received orders from multiple manufacturers.
In the midstream manufacturing segment, Wg Tech (Jiangxi) Group Co.,Ltd. possesses mass production capabilities for TGV glass substrates and an intelligent production line with an annual capacity of 100,000 square meters, capable of achieving a 100:1 aspect ratio and minimum 5-micron vias. Yuntian Semiconductor was the first in China to achieve scaled TGV mass production, breaking the 100:1 aspect ratio barrier. Boe Technology Group Co.,Ltd. initiated a glass substrate pilot line project in 2024, and by the end of June 2025 had completed equipment installation. On the equipment side, Wuhan Dr Laser Technology Corp.,Ltd. completed the first shipment of panel-level glass substrate via drilling equipment in January 2026, breaking the technological and market monopoly of overseas players in this field.
Three Investment Pathways
The report suggests investors focus on three main pathways.
Pathway One: Industry leaders with full-chain layouts. Prioritize companies with mass production capabilities for specialty glass base materials, comprehensive TGV technology deployment across the chain, and well-established downstream customer ecosystems.
Pathway Two: Equipment manufacturers achieving core process breakthroughs. Focus on companies that have made breakthroughs in key TGV processes like via formation and metallization and have entered leading supply chains.
Pathway Three: Leading manufacturers in downstream application adoption. Focus on advanced packaging, testing, and optical module leaders who are early adopters of TGV technology to achieve product performance upgrades. Relevant companies include Tongfu Microelectronics Co.,Ltd., Jcet Group Co.,Ltd., and Eoptolink Technology Inc.,Ltd..
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