Elon Musk's semiconductor ambitions are transitioning from concept to concrete execution. Recent industry investigations by noted Apple supply chain analyst Ming-Chi Kuo reveal that Terafab is procuring key equipment from suppliers at prices "significantly above prevailing market rates." This unusual move directly underscores the extreme time pressure the project is under. Concurrently, ASML Holding NV CEO Christophe Fouquet confirmed this week that he has held direct discussions with Musk regarding the Terafab project, stating that Musk is "very serious" about this chip manufacturing initiative. Announced by Musk in March, Terafab has an initial investment scale of $20 billion. Its goal is to integrate logic chip, memory chip, and advanced packaging production within a single Texas campus. SpaceX has since filed applications for a semiconductor facility in Grimes County, with potential expansion costs reaching up to $119 billion. Fouquet warned that projects like Terafab will continue to pressure equipment manufacturers' capacity for years to come. As the sole global supplier of EUV lithography machines, any new player entering advanced process nodes cannot bypass ASML. **Premium Equipment Purchases Signal Critical Time Pressure** Kuo's investigation highlights Terafab's core dilemma: achieving an extremely broad scope of execution with minimal manpower within an exceptionally short timeframe. Regarding the timeline, Terafab is targeting the Intel 14A process. Its Process Design Kit (PDK) version 0.9 is not expected to be released to external customers until October 2026, meaning external design teams can only begin actual 14A design work at that time. If Terafab fails to engage immediately upon the PDK release, it risks missing the window for Intel 14A low-volume production in 2028, potentially falling behind by an entire process generation. It is precisely this urgent time window that has spurred the premium purchasing behavior. Kuo points out that Terafab has already offered equipment suppliers prices significantly above market rates to secure key equipment. This action itself is a direct manifestation of time pressure—trading capital for time is Terafab's most immediate strategy. The pressure on human resources is equally severe. Kuo estimates that Apple's Silicon Engineering Group (SEG) is several times to tens of times larger than the combined IC design teams at SpaceX and Tesla Motors. Yet, the latter must accomplish a broader range of chip development tasks under more intense time constraints. **Unprecedented Execution Scope Presents Challenges Across Process, Product, and Vertical Integration** Kuo's analysis outlines the complexity of Terafab's execution, which finds almost no precedent in the industry. At the process collaboration level, Terafab is simultaneously advancing three advanced process paths with TSMC, Samsung, and Intel—a first in the IC design industry. At the product line level, the project encompasses two main computing product lines: ground/edge inference and products optimized for the space environment. It also includes over six parallel chip projects such as the AI series, Dojo series, and SpaceX-specific chips. The ambition for vertical integration is similarly unprecedented. Terafab plans to integrate four key processes—mask design, logic chips, memory chips, and advanced packaging—within a single campus. Integration at this scale and level finds no comparable case in the existing industry. Regarding design cycles, Terafab aims to complete a design iteration in 9 months, whereas the industry norm is 18 to 24 months, with complex designs often taking 2 to 3 years. This means Terafab's iteration speed needs to be more than double the industry average. **ASML Confirms Direct Engagement; High-NA EUV Production Nears** Fouquet's remarks at a tech event in Antwerp, Belgium, provide endorsement for Terafab's progress from a key equipment supplier. He confirmed having direct communication with Musk about the Terafab project but did not disclose specifics. He also stated that projects like Terafab and Starlink will continue to pressure equipment manufacturers' capacity for years, implying ASML has already factored Terafab into its capacity planning. On the technical front, Fouquet revealed that the first logic chips produced using ASML's High-NA EUV lithography systems are expected within months. Intel is the earliest adopter of High-NA EUV, having completed installation and acceptance testing of the Twinscan EXE:5200B at its D1X fab in Oregon. High-NA tools use a 0.55 numerical aperture lens, enabling a transistor density approximately 2.9 times that of current EUV systems in a single exposure. Fouquet also confirmed that ASML is developing a second advanced packaging tool, extending its product line from lithography into packaging. While he currently positions this business as "a small leg," he believes it will bring new market opportunities. For Terafab, ASML's strategic importance is irreplaceable. As the sole global EUV lithography supplier, ASML's equipment is a prerequisite for any advanced process chip manufacturing. To achieve its 2028 pilot production target, Terafab's equipment procurement negotiations with ASML will be an unavoidable critical step. **MediaTek Could Be a Key Piece, but Execution Remains the Ultimate Test** Kuo's investigation also points to a potential solution: under multiple execution pressures, bringing in a suitable custom ASIC partner is a practical path for Terafab to accelerate the adoption of Intel 14A. Among several candidate companies, Kuo believes MediaTek is more likely to become Terafab's strategic partner. MediaTek has practical experience collaborating with Intel, including tape-out records on the Intel 16 process and involvement in advanced packaging with EMIB-T. This experience would enable it to assist Terafab in ramping up quickly during the critical window following the release of the 14A PDK 0.9. MediaTek's collaboration progress with Google on TPUs is also seen as a significant reference. According to Kuo's investigation, the development progress of MediaTek's first TPU project with Google exceeded expectations, demonstrating execution capability under a Semi-COT collaboration model and Tier-1 level mass production experience—capabilities that align closely with Terafab's current needs. Furthermore, MediaTek has long supplied Wi-Fi/Router SoCs for Starlink user equipment, establishing an existing business trust relationship with SpaceX. Kuo concludes that Terafab's real challenge lies not in the choice of technology path but in the actual execution under the overlay of multiple pressures. Premium equipment purchases, compressed design cycles, and seeking external partners—these actions collectively signal the same message: Musk's chip-making plan is advancing at a pace and cost far exceeding industry norms.
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