A recent in-depth analysis titled "Intel Foundry: The Last Chance" was published on social media platform X by a Silicon Valley chip engineer known as Damnang2. The analysis suggests that Intel's foundry business stands at a critical crossroads, facing an existential challenge. Despite making aggressive bets on its technology roadmap in an attempt to reshape the competitive landscape with its 18A process node, stark financial data reveals deep structural difficulties. The company must find a way to break out of a vicious cycle characterized by massive losses and a lack of external customers.
Financial results for the fourth quarter of 2025 showed that Intel's foundry segment recorded $4.5 billion in revenue but was accompanied by an operating loss of $2.5 billion. CEO Lip-Bu Tan admitted that the company had "over-invested, too quickly" amid insufficient demand. This statement aligns with risk disclosures in Intel's filings with the U.S. Securities and Exchange Commission (SEC), which explicitly note that the company has not yet secured external foundry customers at any meaningful scale for any of its process nodes.
The analysis posits that the current situation is not merely a problem of a trust deficit but a profound structural challenge. The moat in the foundry industry is built upon decades of technological accumulation. From the compatibility of design tools to the yield learning curve in mass production, latecomers face extremely high barriers. Concurrently, capacity expansions by TSMC in the US and Japan, coupled with Samsung Electronics' resurgence, are rapidly squeezing the survival space for Intel as an "alternative option."
For investors, the core focus has shifted from technological roadmaps to execution and tangible results. The market is closely watching whether Intel can, within the narrow "window of opportunity" from 2026 to 2027, convert geopolitical tailwinds into concrete customer orders and reliable yield data. If it fails to establish a positive business cycle during this period, its foundry strategy could face irreversible pressure to contract.
The analysis highlights that the core barrier to entry in the foundry business is not a single technology but a systemic barrier built by the compound effect of time and production volume. Every step from chip design to mass production presents severe challenges for any company trying to catch up.
A primary obstacle lies in the Process Design Kit (PDK) and Model Hardware Correlation (MHC). The PDK acts as a bridge between design and manufacturing, and its core metric, MHC, determines whether silicon performance matches simulation predictions. TSMC, with over three decades of data accumulated from serving thousands of customers, can continuously calibrate its models for high accuracy. In contrast, Intel's 18A PDK 1.0 was only released in July 2024. Although Intel claims over 100 tape-outs, its verification maturity is still assessed as far behind competitors in industry evaluations. Furthermore, a lack of a robust IP ecosystem creates a "chicken-and-egg" problem: TSMC has thousands of silicon-verified IP blocks because it has many customers, which leads to high returns for IP developers; Intel, having fewer customers, consequently has fewer IPs, making it even harder to attract new clients.
On the manufacturing side, the accumulation of Best Known Methods (BKM) also relies on scale. BKMs are derived from repeatedly running and correcting defects across vast quantities of wafers with diverse design patterns. TSMC has amassed rich process data by handling chips for a wide array of customers. Intel, however, primarily relies on its own x86 processors, lacking extensive process experience with diverse designs like mobile APs and AI accelerators.
This technological gap ultimately translates into harsh economic realities. The core of foundry economics is yield and capacity utilization. At advanced nodes, the cost per wafer exceeds $20,000. Improving yield from 65% to 90% can reduce the cost per chip by over 38%. Simultaneously, low capacity utilization leads to high fixed cost分摊. Intel Foundry's current losses are a structural consequence of the dual burden of low yields and low utilization. The lack of external volume results in insufficient learning data, slow yield ramps, higher costs, weakened competitiveness, and difficulty in acquiring new customers—a negative cycle that urgently needs to be broken.
As Intel's core weapon for its counteroffensive, the 18A process entered production in the second half of 2025, with initial products including Panther Lake for PCs and Clearwater Forest for servers. While Lip-Bu Tan has expressed optimism about the progress, it has so far been largely confined to Intel's own products. The true test will be the 18A-P version intended for external customers, with large-scale production and customer validation not expected to yield clear results until 2026.
In direct competition with TSMC's N2 node, each has distinct advantages. Intel relies on its PowerVia backside power delivery technology, claiming advantages in performance and power efficiency by theoretically alleviating routing congestion. However, in terms of density, TSMC's N2, with 313 million transistors per square millimeter, significantly leads Intel's 18A, which has 238 million. Higher density generally translates to lower per-chip cost. Furthermore, while PowerVia is advanced, it requires customers to redesign their power delivery networks, increasing migration costs. In contrast, TSMC offers a front-side power delivery option on N2, providing a smoother transition path for customers.
Meanwhile, Samsung Electronics is re-entering the fray as a significant threat Intel cannot ignore. Despite previously losing Qualcomm orders due to yield issues, Samsung is making a comeback with its SF2 process. Reports indicate Samsung has signed a long-term supply agreement with Tesla valued at $16.5 billion, and there are signals of Qualcomm's return. Samsung not only employs aggressive pricing strategies but its wafer fab in Taylor, Texas, also directly undermines the uniqueness of Intel's "US-made" geopolitical premium.
In this competitive landscape, the "multi-sourcing" strategies of fabless customers represent Intel's final opportunity. According to analyst Ming-Chi Kuo, Apple has received the 18A-P PDK from Intel and conducted internal simulations, with results meeting expectations. Market speculation suggests Apple might assign production of entry-level chips for MacBook Air or iPad Pro to Intel in 2026. For Apple, this would serve to reduce its sole reliance on TSMC and mitigate geopolitical risks. However, this deal is not yet finalized, with the first half of 2026 being a critical decision point.
NVIDIA's stance appears more cautious. Although NVIDIA has invested $5 billion in Intel and holds approximately a 4% stake, signals regarding collaboration on wafer manufacturing remain ambiguous. Reuters reported that NVIDIA had paused testing on 18A, but DigiTimes later indicated that NVIDIA is exploring the use of Intel's 18A or 14A process to manufacture I/O modules for its next-generation GPU and combining it with Intel's EMIB advanced packaging technology. This model—keeping compute cores at TSMC while experimenting with Intel for peripheral modules—might be the most pragmatic entry point.
Additionally, Microsoft and Amazon AWS have plans to utilize Intel's 18A for producing AI accelerators and custom server chips, though this seems more a strategic move for supply chain resilience than a pure technology choice.
The window of opportunity for Intel is closing. As TSMC's Arizona fab and Samsung's Taylor fab ramp up production, the geopolitical premium currently enjoyed by Intel for "US-based manufacturing" will diminish. If Intel cannot demonstrate stable yields and a mature ecosystem between 2026 and 2027, major customers are likely to remain committed to TSMC or turn to a resurgent Samsung.
For Intel Foundry, this is no longer a narrative about "potential" but a final battle about "proof." Only the successful adoption of 18A-P by external customers and the establishment of mass production volume can initiate the flywheel of yield learning, thereby creating survival space for the subsequent 14A process node. Failure to do so could lead to another strategic retrenchment for its foundry ambitions.
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