Gf Securities released a research report stating that memory technology is advancing toward a dual-wafer stacked architecture (memory wafer + logic wafer) to achieve optimal system performance. Logic wafers are expected to adopt a foundry model, leveraging the most suitable processes for collaborative industrial development. In the future, China may also rely on its abundant logic foundry resources to achieve synergy between memory IDM and logic foundry sectors. As AI applications gradually achieve technological implementation and iterative updates, related supporting industries are poised to benefit significantly. The report recommends focusing on wafer foundries and upstream semiconductor equipment companies.
Key insights from Gf Securities include:
**Memory Technology Advances Toward Dual-Wafer Stacked Architecture** In 3D NAND, domestic Xtacking technology and overseas BiCS technology have already enabled the separate processing and integration of memory arrays and logic circuits, delivering superior product performance. For instance, Yangtze Memory’s Xtacking architecture separates the design and manufacturing of memory cells and logic circuits, integrating them through hybrid bonding technology to achieve faster I/O speeds, higher storage density, and enhanced reliability. Since its debut six years ago, Xtacking has increased NAND I/O interface speeds from 800MT/s to 3.6GT/s—a fourfold improvement.
In DRAM, future chips may undergo architectural upgrades using CBA technology, which involves manufacturing memory array wafers and logic control unit wafers separately before bonding them via fusion or hybrid bonding for superior system performance. For example, Samsung and SK Hynix are developing next-gen DRAM by fabricating memory cells and peripheral circuits on separate wafers and connecting them via hybrid bonding to boost memory cell density.
**Logic Wafers May Shift to Foundry Model for Industrial Synergy** As memory technology evolves toward a memory-logic dual-wafer stack, logic wafer manufacturing could transition from the traditional IDM model to a foundry approach. This would allow logic wafers to adopt different processes from memory wafers, leveraging HKMG, FinFET, and other advanced logic foundry technologies to optimize system-level performance.
For instance, Samsung’s 10th-gen V-NAND uses its logic process to fabricate peripheral circuits (including row decoders, sense amplifiers, buffers, voltage generators, and I/O) on separate wafers. Meanwhile, SK Hynix’s previous HBM products, including HBM3E, utilized in-house processes for base dies, but starting with HBM4, the company plans to adopt TSMC’s advanced logic technology to enhance functionality through finer processes.
China is also expected to leverage its robust logic foundry resources to foster synergy between memory IDM and logic foundry sectors.
**AI Drives Memory Sector Growth, Accelerating Foundry Development** The expanding demand for AI inference and other applications has significantly boosted the memory industry’s momentum, increasing the urgency for capacity expansion and technological upgrades. As an emerging model in the memory sector, the logic wafer foundry approach is expected to gain traction, improving semiconductor performance, area, cost, and time-to-market more efficiently. With ongoing technological implementation and iterations, related supply chains stand to benefit substantially.
**Risk Factors** Potential risks include weaker-than-expected market demand, delays in R&D progress, and slower customer acquisition.
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