AI Memory Demand Sparks Expansion: Kioxia Plans Third Wafer Fab in Iwate, Japan

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Kioxia Holdings Corp is reportedly preparing to construct a new wafer fabrication facility at its production site in Iwate Prefecture, northern Japan, as the memory chip giant moves to expand capacity in response to unrelenting demand for artificial intelligence-related storage. Sources familiar with the matter indicate that the Tokyo-based chipmaker is expected to formally unveil its expansion blueprint later on Thursday.

According to insiders, the new plant will mark the third fab at the Iwate location and will be dedicated to producing the company's latest-generation, high-density 3D flash memory chips engineered to handle the immense workloads generated by AI services. Meanwhile, Kioxia's primary facility in Yokkaichi, Mie Prefecture, will continue to focus on manufacturing chips for consumer products such as smartphones, with the Iwate site specializing in premium NAND for data center applications.

Kioxia last month began shipping samples of its tenth-generation BiCS FLASH 3D flash memory to major AI data center operators. The 1Tb TLC (triple-level cell) chip, featuring a 332-layer stacking architecture, is being exclusively produced at the company's Fab2 facility in Kitakami, Iwate Prefecture.

The BiCS10 memory represents a significant leap forward on Kioxia's technology roadmap. Compared with the eighth-generation BiCS FLASH, the new product achieves several key breakthroughs: stacking layers have jumped from 218 to 332, while storage density has reached more than 29Gb/mm², a 59% improvement over BiCS8. The interface supports the Toggle DDR6.0 standard with speeds up to 4800MT/s, a 33% increase from the prior generation. Power efficiency has also been substantially optimized, with output power consumption down 34%, read energy efficiency up 30%, input power down 10%, and write energy efficiency improved by 18%.

Architecturally, BiCS10 fully retains two core underlying technologies first introduced in the eighth generation: CMOS directly Bonded to Array (CBA) and Pitch-staggered Gate (OPS). The CBA architecture separates the manufacturing of the memory array wafer and the logic CMOS wafer before bonding them together, overcoming the wiring limitations of conventional monolithic wafers and significantly raising the ceiling on stacking layers. This continuity of a mature process system means there is no need to rebuild a brand-new production line, which will notably shorten the production ramp-up cycle for the new product.

Kioxia has stated that these new products will primarily be integrated into enterprise and data center solid-state drives (SSDs), aimed at addressing the increasingly urgent demand in the AI storage sector for high performance, large capacity, and low power consumption. The investment will be carried out jointly with manufacturing partner SanDisk Corp (NASDAQ: SNDK), according to reports. Sources added that Kioxia and SanDisk will seek financial subsidies from the Japanese government, which has in recent years provided fiscal support to companies including Taiwan Semiconductor Manufacturing Co (NYSE: TSM), Sony Group Corp (NYSE: SONY), and Micron Technology Inc (NASDAQ: MU) as they expand chip manufacturing capacity in Japan.

Kioxia CEO Nobuo Hayasaka and SanDisk CEO David Goeckeler are scheduled to visit Japanese Prime Minister Shigeru Ishiba on Thursday afternoon. The company faces mounting pressure to increase output in order to meet demand that has been secured through ultra-long-term contracts spanning multiple years. The announcement also comes on the heels of aggressive expansion plans by Korean rivals and the rising market share of China's Yangtze Memory Technologies Co (YMTC). According to the latest data from market research firm Counterpoint Research, YMTC is rapidly gaining ground in the global NAND flash market, climbing to third place worldwide in the second quarter of 2026 by shipment volume, trailing only South Korea's two memory behemoths, Samsung Electronics and SK Hynix.

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