QuickLogic said it signed a mid-6-figure contract to implement architectural enhancements for its embedded FPGA hard IP in a customer ASIC using Intel 18A technology. The company said the enhancements are intended to reduce power consumption, increase performance, and reduce silicon area for high-density eFPGA cores. Andy Jaros, VP of IP Sales, said the work builds on PPA improvements developed under a 2025 contract.
Disclaimer: This news brief was created by Public Technologies (PUBT) using generative artificial intelligence. While PUBT strives to provide accurate and timely information, this AI-generated content is for informational purposes only and should not be interpreted as financial, investment, or legal advice. QuickLogic Corporation published the original content used to generate this news brief via PR Newswire (Ref. ID: SF11813) on March 17, 2026, and is solely responsible for the information contained therein.
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