Market Chatter: TSMC Plans 3 Nanometer Japan Chip Production Launch

MT Newswires Live04-01

Taiwan Semiconductor Manufacturing (TSM) plans to begin equipment setup and mass manufacturing of 3-nanometer semiconductors at its second Japanese facility in 2028, Reuters reported Wednesday, citing a Taiwanese government filing.

The updated regulatory document indicates the upcoming plant will output 15,000 12-inch wafers monthly using the three-nanometer process, the news outlet reported.

TSMC originally targeted less complex components for its regional expansion, previously announcing a $20 billion investment across both factories to produce 100,000 wafers monthly using older architectures, Reuters reported.

The chipmaker's Chief Executive CC Wei reportedly disclosed the strategy for the second site's launch during a February meeting with Japanese Prime Minister Sanae Takaichi.

Taiwan Semiconductor Manufacturing did not immediately respond to MT Newswires' request for comment.

(Market Chatter news is derived from conversations with market professionals globally. This information is believed to be from reliable sources but may include rumor and speculation. Accuracy is not guaranteed.)

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