Tailwind #3: Margin expansion. To grasp why margins matter, picture $Intel(INTC)$  as a restaurant that stopped cooking and used delivery services. The food might be acceptable, the menu could be competitive, but now one pays the delivery service's margin atop ingredient costs. $Intel(INTC)$ 's flagship processors Lunar Lake and Arrow Lake are nearly entirely manufactured by TSM. $Intel(INTC)$  designs the chips, ships plans to Taiwan, pays $Taiwan Semiconductor Manufacturing(TSM)$ 's fabrication costs plus its margin, receives finished silicon, then competes on pricing with AMD. The issue is AMD also uses TSM. Both firms share the same supplier, but AMD lacks a cash-bleeding foundry business or partially idle fabs. AMD can price to its cost structure; $Intel(INTC)$  cannot. The figures are clear: $Taiwan Semiconductor Manufacturing(TSM)$  charges roughly $20,000 to $30,000 per wafer at 3nm, with 58% gross margin. $Intel(INTC)$  cannot pass costs to customers while staying competitive, so it absorbs them. CFO David Zinsner called Lunar Lake's on-package memory design a "bigger margin implication" as volumes exceeded niche forecasts. This indicates a premium line meant to be small-scale became a margin drain at volume. Memory added procurement expenses, handling complexity, and reduced flexibility – all mandated by the architecture, not $Intel(INTC)$ 's choice.