Mizuho analyst Vijay Rakesh, who ranks #6 among the thousands of Wall Street analysts, believes that possibility deserves serious consideration following investor meetings with Micron CEO Sanjay Mehrotra.

Supply sits near the top of his bullish argument, particularly as investors consider whether Micron’s rising capital expenditures could eventually create too much memory capacity. Rakesh believes those worries are premature, writing that “MU sees DRAM/NAND market tight well through 2027.” Additional production arriving during 2028 should remain limited, leaving the industry without enough new capacity to meaningfully alter the balance between available memory and customer demand.

The way Micron is spending its money helps explain why Rakesh expects that supply increase to remain limited. The analyst estimates fiscal 2027 capital expenditures could reach about $50 billion, up 67% year-over-year, but much of that spending will go toward constructing fabrication facilities rather than equipment that can immediately increase output. That leaves Rakesh convinced that “MU’s first greenfield bits will still be small in 2028.” In other words, Micron can spend heavily today without creating an immediate wave of additional memory supply.

Rakesh sees another reason for optimism in Micron’s strategic customer agreements, or SCAs. The analyst believes more than half of the company’s memory bits could eventually fall under these agreements, while stating that SCAs can “sustain 80%+” gross margins. Better yet, he believes “SCAs have price premium for future products,” suggesting these longer-term commitments could provide greater demand visibility while preserving attractive economics on newer memory products.

Potential risks remain, although Rakesh views several of them as less threatening than investors might assume. Nvidia and other AI-chip customers, for example, could reduce the amount of LPDDR5 memory included with future processors. Rakesh views that possibility “as more of a response to shipping more AI” accelerators, suggesting lower memory content per processor could accompany greater overall chip volumes as customers seek additional computing capacity